- 有效日期：2017年12月05日 至 2018年03月05日
【校招】IC Design-Shanghai/Suzhou 职位描述：
Interested candidates please send your updated resume to Emily.firstname.lastname@example.org , specifying where you see this position advertised.
Position I: SoC/IP Frontend Design & Verification Engineer
• Design and verification for digital IP.
• Involve in ARM based SoC development, such as verification/debug/customer support.
• Participate in logic synthesis, DFT, timing analysis and closure.
• Write the technical documents/papers as required.
• Cooperate with and provide support to other functional teams (S&A, SW, TE/PE) in the NPI execution.
•Bachelor, Master or above on Electronics, Communications, Microelectronics Engineering, Computer Science or related majors.
•Experienced on high-level RTL languages with good knowledge of IC design flow, including coding, simulation, verification, synthesis, DFT and STA.
•Familiar with the main EDA tools, such as Cadence, Synopsys and Mentor, and their related methodology/flow.
•Familiar with high speed serial bus, graphic, audio/video, or display/sensor such as USB/PCIe/HDMI/MIPI/GPU is a plus.
•DDR knowledge and experiences is a plus.
•Familiar with AMBA (AXI/AHB/APB, etc.) specs is a plus.
•Scripting language like Perl, Tcl or Python experiences is a plus.
• Have knowledge about computer architecture, 8bit, 16bit or 32bit Micro-controller or Micro-processer is a plus.
• Prefer experience of formal verification with property scheme, for example SVA (System Verilog Assertion).
Position II: SoC/IP Frontend Design & Verification Engineer
• Architecture definition for ARM based SoC, including CPU, bus fabric, display, video and graphics.
• Be responsible for SoC high-level architecture document creation based on marketing and customer requirement.
• Work with IP owner and SoC design team to define the details in IP micro-architecture and RTL implementation.
• System performance analysis and benchmarking, and drive system optimization from both SoC and SW.
• Master of E.E. or C.S.
• Excellent coding skill with verilog HDL and C/C++.
• Excellent spoken and written English.
• Strong interpersonal and communication skills.
• Familiar with ARM based processor architecture and AMBA bus protocol. ARM Cortex-A / Cortex-M processor development background is preferred.
• Strong knowledge in multimedia applications, such as audio, video, graphics.
Position III: Analog/Mixed Signal Design Engineer
• Responsible for analog / mixed-signal IP design for MCU product development
• Independent IP schematic design / analog & mix-signal simulation/ layout design / IP view generation / technical documentation
• Work with SoC / Backend team on IP integration.
• Work with test/validation/qualification team on IP validation, characterizations and failure analysis.
• Master degree, majoring in microelectronics, electronic engineering , computer science or relevant disciplines.
• Familiar with analog/mix-signal IC schematic and layout design
• Familiar with design EDA tool: Hspice/Spectre, Virtuso, Calibre, Matlab, Assura, QRC;
• Familiar with lab equipments and silicon validation /debug flow
• Experience in power management module design ( high accuracy bandgap /LDO/DC-DC/…) is a plus
• Experience in data conversion module design ( ADC/DAC) is a plus
• Experience in clock generation module design ( crystal osc/ relaxation osc/ /PLL/FLL/DLL) is a plus
• Experience in mix-signal circuit modeling & simulation is a plus
• Good communication skills and team work
• Good oral and written English skills
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